1. Field of the Invention
The present invention generally relates to the field of Asynchronous Transfer Mode (ATM) technology. More particularly, the present invention relates to a system and method for shaping and delivering ATM cells in accordance with specified quality of service (QoS) standards.
2. Background Art
An important aspect of ATM network technology is its ability to provide specific levels of QoS for an established virtual circuit (VC) or path between a source and destination. QoS is defined on an end-to-end basis of each VC based on specified parameters corresponding to service type, peak cell rate (PCR), sustained cell rate (SCR), and cell delay variation tolerance (CDVT). Service types define VC cell delivery by a source node and are specified as constant bit rate (CBR), variable bit rate (VBR), or unspecified bit rate (UBR). The PCR is the minimum inter-cell spacing in seconds. The SCR is a maximum average rate cells can be sent at the PCR. The CDVT is a measure of cell clumping or how much more closely or further the cells are spaced than a nominal interval. The CDVT determines the ability to get cells out as close to the scheduled time as possible, where it is desired to have little to no variation. It is the responsibility of the network source node to provide data to the ATM network according to the specified service type, at the specified cell rate, and with minimal variation in the delivery of the cell from the nominal delivery time (or minimal CDVT).
Devices at the end-points of the ATM network are the producers and consumers of data traveling across the ATM network. Devices at the customer end-point are typically referred to as Customer Premise Equipment (CPE). Devices at the service or network provider end-points can fall into one of a number of categories, for example web servers, circuit-switches, and video-streaming servers. In the ATM network, data between a producer and consumer travels across the network over the VC. Each source node in a network will typically have multiple VCs established with one or more destination nodes. In order to communicate across an ATM based network with specific QoS requirements, both provider and CPE devices require a traffic shaper to “shape” transmit traffic on each VC according to the specified QoS parameters established during the VC initialization. Currently, traffic shapers are primarily implemented in software.
Unfortunately, presently available software implemented traffic shapers have a limited ability to handle high bit rate data transmission, which is now in the gigabit per second (Gbps) range. Typically, this is because the processor cannot sustain a normal interrupt rate for high bit rate scheduling. The traffic shaper stores cells before sending them to a scheduler, and cannot release those stored cells until it receives an interrupt signal from the scheduler that the cells have been transmitted on a VC. A lot of overhead must be used in order to handle the quantity of interrupt signals required at Gbps levels of data transmission. This increases the CDVT, which can cause cell buffers to overflow. Also, presently available software implemented traffic shapers are not easily scalable to handle more VCs and cannot achieve desired shaping resolutions over a wide range (kilo bits per second (kbps to Gbps)) of cell bit rates.
Therefore, what is needed is a traffic shaper that can handle a wide range of cell bit rates (kbps to Gbps) and still have little to no CDVT, the ability to be scalable to handle any number of VCs, and the ability to adjust shaping resolution based on bit rate, while maintaining a desired implementation size.